The invention relates to a semiconductor device having a charge-coupled device provided at a surface of a semiconductor body and comprising an input stage for forming charge packets in dependence upon an input signal, a row of clock electrodes provided with connection means for applying clock voltages on behalf of the sequential storage and transport of these charge packets in an underlying charge transport channel, the input stage comprising, viewed in the charge transport direction, in order of succession an input diode, a first electrode (designated hereinafter as sample gate) and a second electrode (designated hereinafter as input gate), while the input diode is provided with a connection for applying a fixed voltage, the input gate is provided with means for applying the input signal and the sample gate is provided with means for applying a sample clock voltage for closing the connection between the input diode and the region below the input gate.
A charge-coupled device having such an input stage, (designated as SHC2 (sample and hold circuit 2) is described inter alia in the article "A comparison of CCD Analog Input Circuit Characteristics" by H. Wallings, International Conference on Technology and Applications of Charge-Coupled Devices, Edinburgh, September 1974, p. 13-21. For further background, see also "IEEE Journal of I.S.C.", Vol. SC-13, No. 5, pp. 542-548 (October 1978). Such an input can be used not only in analog applications, but also advantageously in digital applications and is particularly suitable for use at high frequencies. The first-mentioned publication indicates as a disadvantage of this input stage that special steps should be taken to guarantee that the charge packet formed below the input gate is transferred as a whole to the storage zone below the adjacent first clock electrode. The problem of incomplete charge transport arises especially in known charge-coupled devices in which the clock electrodes have a transfer part and a storage part, internal means being provided (such as thicker oxide or an implantation), by which upon application of voltages a potential barrier is formed below the transfer part and a potential well is formed below the storage part. As will appear from the description of the Figures, due to this potential barrier, the range within which the input signal can vary is very small because of the requirement that the whole charge packet must be transferred.